Andrew Yang
University student from Simon Fraser University, Technical Documentation Co-op at EIM Technology
About
Andrew Yang is an engineering student with a strong passion for digital systems, circuit design, and hands-on learning. While exploring topics like FPGA programming and signal processing, he independently developed a DDS Function Generator project—from writing Verilog modules and building a resistor-based R-2R DAC, to measuring waveforms with an oscilloscope.
In addition to building functional hardware, he enjoys breaking down complex technical topics into clear, approachable steps—something reflected in the way he documents and shares projects. This passion for both learning and teaching has led him to support others through peer mentoring and collaborative development.
By blending code, circuits, and real-world debugging, Shuang Yang aims to inspire more students to embrace engineering not just as theory, but as something they can build, test, and see in action.
Experiences with Us
Technical Documentation Technician Co-op
Period: Jan 2024 - Apr 2024 [Co-op] [On-site]
Andrew Yang serves as a Technical Documentation Co-op at EIM Technology, where he bridges the gap between engineering and education. He works with STEPFPGA hardware and Web IDE tools to validate Verilog-based projects, and transforms them into well-structured learning resources. His documentation focuses on clarity and accessibility, helping high school students and beginners understand complex digital design concepts through hands-on experimentation.
Participated Projects
Project: A simple DDS(Direct Digital Synthesis) Function Generator
Period: Jan 2025 - Apr 2025
Members: Andrew
A hands-on FPGA-driven DDS system capable of producing sine, square, and triangle waveforms through digital-to-analog conversion.
Other Collective Work
Digital Alarm Clock (VHDL, Cyclone V FPGA)
In collaboration with two classmates in Simon Fraser University, Andrew helped design and implement a digital alarm clock using VHDL on an Intel Cyclone V FPGA. The clock supports both 12-hour and 24-hour display modes and allows time zone conversion by adding a fixed hour offset. It also includes an alarm function that compares the current time to a preset value, triggering three LEDs when the alarm condition is met. My primary contributions included writing the VHDL code for the time comparison logic and LED alarm control, as well as integrating all functional modules—such as time display, mode switching, and alarm triggering—into a fully working system.
Expertise
FPGA development using Verilog and VHDL
Digital circuit design and simulation
Breadboard prototyping and discrete component wiring
Soldering techniques for module-to-board integration
Technical documentation for beginner-friendly learning
Hands-on hardware prototyping and signal visualization
Educational project development using STEPFPGA and Web IDE
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